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  cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 002-08559 rev. *c revised june 22, 2017 mb3793-28a power-voltage monitoring ic with watchdog timer datasheet description the mb3793 is an integrated circuit to monito r power voltage; it incorporates a watchdog timer. a reset signal is output when t he power is cut or falls abruptly. when the power recovers normally after resetting, a po wer-on reset signal is output to micropro cessor units (mpus). an internal watchdog timer wi th two inputs for system oper ation diagnosis can provide a fail-safe function for va rious application systems. features precise detection of power voltage fall: 2.5% detection voltage with hysteresis low power dispersion: i cc = 41 a (typ) internal dual-input watchdog timer watchdog timer halt function independently-set watchdog and reset times application arcade amusement etc. model no. marking code detection voltage mb3793-28a 3793ar 2.8 v
document number: 002-08559 rev. *c page 2 of 23 mb3793-28a contents description ............. ............................... ............................ 1 features .................. ............................... ............................ 1 application ............. ............................... ............................ 1 contents ................. ............................... ............................ 2 1. pin assignment ............... ..................... ...............3 2. pin description ................ ..................... ...............3 3. block diagram ................. ..................... ...............4 4. block functions .............. ..................... ...............5 4.1 comp. s ........ ..................... ..................... .............. 5 4.2 output circuit ............ ........................ ..................... 5 4.3 pulse generator ........... ......................... ................. 5 4.4 watchdog timer ........... ......................... ................. 5 4.5 logic circuit ............................... ............................ 5 5. absolute maximum rating s ................ ...............6 6. recommended operating co nditions ..............6 7. electrical characteristics .................... ...............7 7.1 dc characteristics ...... ......................... ................. 7 7.2 ac characteristics ....... ......................... ................. 7 8. timing diagram ............... ..................... ...............8 8.1 basic operation (positive clock pulse) .................. 8 8.2 basic operation (negative clock puls e) ................ 9 8.3 single-clock input monitori ng (positive clock pulse) 10 8.4 inhibition operation (pos itive clock pulse) ........... 11 8.5 clock pulse input supplementation (positive clock pulse) ......... ............................ ................... 12 9. operation sequence ....... ................... ...............13 9.1 positive clock pulse in put ................. ................... 13 9.2 negative clock pulse in put ................ ................... 13 9.3 single-clock input monito ring ........... ................... 13 9.4 description of operatio ns ................. ................... 13 10. typical characteristics ................... ...............15 11. application example ....... ................. ...............18 11.1 supply voltage monito r and watchdog timer ..... 18 11.2 supply voltage monitor and watchdog timer stop 19 11.3 setting of compulsory reset ........... ................... 19 12. usage precaution .......... ................... ...............20 13. ordering information .... ................... ...............20 14. rohs compliance information of lead (pb) free version .......... .......................... .......................20 15. package dimensions ...... ................. ...............21 16. document history ......... ................... ...............22 sales, solutions, and legal information ...................... 23
document number: 002-08559 rev. *c page 3 of 23 mb3793-28a 1. pin assignment 2. pin description pin no. symbol description 1 reset outputs reset pin 2 ctw sets watchdog timer monitoring time pin 3 ctp sets power-on reset hold time pin 4 gnd ground pin 5 vcc power supply pin 6inh this pin forces the watchdog timer on/off. when this pin is high level, the watch- dog timer is stopped. 7 ck2 inputs clock 2 pin 8 ck1 inputs clock 1 pin ( sob008 ) ctw ctp gnd v cc inh ck2 ck1 (top view) 1 2 3 4 8 7 6 5 reset
document number: 002-08559 rev. *c page 4 of 23 mb3793-28a 3. block diagram i 1 = 3 a . . i 2 = 30 a . . r 1 = 315 k . . 3 1 6 2 8 7 5 4 ctp to v cc of all blocks pulse generator 1 watchdog timer reference voltage generator to gnd of all blocks pulse generator 2 output circuit logic circuit reset inh ctw ck1 ck2 v cc gnd comp.s ? + v s v ref = 1.24 v . . r 2 = 240 k . .
document number: 002-08559 rev. *c page 5 of 23 mb3793-28a 4. block functions 4.1 comp. s comp. s is a comparator with hysteresis to compare the reference vo ltage with a voltage (v s ) that is the result of dividing the power voltage (v cc ) by resistors r 1 and r 2 . when v s falls below 1.24 v, a reset signal is output . this function enable s the mb3793 to detect an abnormality within 1 s when the power is cut or falls abruptly. 4.2 output circuit the output circuit has a comparator to control the reset signal (reset ) output. when the voltage at the ctp pin for setting the power-on reset hold time exceeds the thre shold voltage, resetting is canceled. since the reset (reset ) output buffer has the cmos organiza tion, no pull-up resistor is needed. 4.3 pulse generator the pulse generator generates pulses when th e voltage at the ck1 and ck2 input clock pi ns changes from low level to high level (positive-edge trigger) and exceeds the threshold voltage; it sends the clock signal to the watchdog timer. 4.4 watchdog timer the watchdog timer can monitor tw o clock pulses. short-circuit the ck1 and ck2 clock pins to monitor a single clock pulse. 4.5 logic circuit logic circuit controls charging and discharging of the power-on reset hold time setting capacity (c tp ) on a signal of comp.s and watchdog timer.
document number: 002-08559 rev. *c page 6 of 23 mb3793-28a 5. absolute maximum ratings * : the voltage is based on the ground volt age (0 v). warning: semiconductor devices can be perma nently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum rating s. do not exceed these ratings. 6. recommended operating conditions * : the watchdog timer monitor time range depends on the rati ng of the setting capacitor. warning: the recommended operating conditio ns are required in order to ensure th e normal operation of the semiconductor device. all of the device's electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their re commended operating condi tion ranges. operation outside these ranges may adverse ly affect reliability and could result in device failure. no warranty is made with respect to uses, operati ng conditions, or combinations not represented on the data sheet. users considering applic ation outside the listed conditions are advised to contact their representatives beforehand. parameter symbol conditions rating unit min max power supply voltage* v cc ? ? 0.3 + 7v input voltage* ck1 v ck1 ? ? 0.3 v cc + 0.3 ( + 7) v ck2 v ck2 ? inh v inh ? reset output voltage* reset v ol v oh ? ? 0.3 v cc + 0.3 ( + 7) v reset output current i ol i oh ? ? 10 + 10 ma power dissipation p d ta + 85 ? c ? 200 mw storage temperature tstg ? ? 55 + 125 c parameter symbol conditions value unit min typ max power supply voltage v cc ? 1.2 3.3 4.0 v reset (reset ) output current i ol ?0? + 5 ma i oh ? ? 5? 0 power-on reset hold time setting capacity c tp ? 0.001 0.1 10 f watchdog-timer monitoring time setting capacity* c tw ? 0.001 0.01 1 f operating ambient temperature ta ? ? 40 + 25 + 85 c
document number: 002-08559 rev. *c page 7 of 23 mb3793-28a 7. electrical characteristics 7.1 dc characteristics * : this parameter is guaranteed by design, which is not supported by a final test. 7.2 ac characteristics *: the voltage range is 10% to 90% at te sting the reset output transition time. (v cc = + 3.3 v, ta = + 25 c) parameter symbol conditions value unit min typ max power current icc1 after exit from reset ? 41 55 a detection voltage vsl vcc falling ta = + 25 c 2.73 2.80 2.87 v ta = ? 40 to + 85 c 2.69* 2.80 2.91* vsh vcc rising ta = + 25 c 2.80 2.87 2.94 v ta = ? 40 to + 85 c 2.76* 2.87 2.98* detection voltage hysteresis difference vshys vsh - vsl 25 70 100 mv ck input threshold voltage vcih ? 0.7* 1.3 1.9 v vcil ? 0.5 1.0 1.5* v ck input hysteresis vchys ? 0.1* 0.3 0.6* v inh input voltage viih ? 2.2 ? v cc v viil ? 0 ? 0.8 v input current (ck1,ck2,inh) iih vih = vcc ? 01.0 a iil vil = 0 v ? 1.0 0 ? a reset output voltage voh ireset = ? 3 ma 2.8 3.1 ? v vol ireset = + 3 ma ? 0.12 0.4 v reset-output minimum power voltage vccl ireset = + 50 a ? 0.8 1.2 v (vcc = + 3.3 v, ta = + 25 c) parameter symbol conditions value unit min typ max power-on reset hold time tpr ctp = 0.1 f3075120ms watchdog timer monitoring time twd ctw = 0.01 f, ctp = 0.1 f 81624ms watchdog timer reset time twr ctp = 0.1 f25.59ms ck input pulse width tckw ? 500 ?? ns ck input pulse cycle tckt ? 20 ?? s reset (reset ) output transition time rising tr* cl = 50 pf ?? 500 ns falling tf* cl = 50 pf ?? 500 ns
document number: 002-08559 rev. *c page 8 of 23 mb3793-28a 8. timing diagram 8.1 basic operation (positive clock pulse) ctp reset inh ctw ck1 ck2 v sh v cc v sl v th v h v l (1) (2) (3) (4)(5) (5) (6) (7) (8) (9) (10) (11) (12) (13) t pr t wd t pr t wr t ckw t ckt
document number: 002-08559 rev. *c page 9 of 23 mb3793-28a 8.2 basic operation (negative clock pulse) ctp reset inh ctw ck1 ck2 v sh v cc v sl v th v h v l t pr t wd t pr t wr t ckw t ckt (1) (2) (3) (4)(5) (5) (6) (7) (8) (9) (10) (11) (12) (13)
document number: 002-08559 rev. *c page 10 of 23 mb3793-28a 8.3 single-clock input moni toring (positive clock pulse) ctp reset ctw ck1 v th v h v l ck2 t wr t wd t ckt t ckw note : the mb3793 can monitor only one clock. the mb3793 checks the clock signal at every other input pulse. therefore, set watchdog timer monitor time t wd to the time that allows the mb3793 to monitor the period twice as long as the input clock pulse.
document number: 002-08559 rev. *c page 11 of 23 mb3793-28a 8.4 inhibition operation (positive clock pulse) ctp reset inh ctw ck1 ck2 v sh v cc v sl v th v h v l t pr t wd t pr t wr t ckw (1) (2) (3) (4)(5) (5) (6) (7) (11) (8) (9) (10) (12) (13) t ckt
document number: 002-08559 rev. *c page 12 of 23 mb3793-28a 8.5 clock pulse input suppleme ntation (positive clock pulse) ctw ck1 ck2 v h v l t ckt t ckw * 1 * 2 note : the mb3793 watchdog timer monitors cloc k1 (ck1) and clock2 (ck2) pulses alternately. when a ck2 pulse is detected after detecting a ck 1 pulse, the monitoring time setting capacity (c tw ) switches to charging from discharging. when two consecutive pulses occur on one side of th is alternation before switching, the second pulse is ignored. in the above figure, pulse *1 and *2 are ignored.
document number: 002-08559 rev. *c page 13 of 23 mb3793-28a 9. operation sequence 9.1 positive clock pulse input refer to ? basic operation (positive clock pulse) ? under ? timing diagram ?. 9.2 negative clock pulse input refer to ? basic operation (neg ative clock pulse) ? under ? timing diagram ?. the mb3793 operates in the same way whethe r it inputs positive or negative pulses. 9.3 single-clock input monitoring to use the mb3793 while moni toring only one clock, conn ect clock pins ck1 and ck2. although the mb3793 operates basica lly in the same way as when mo nitoring two clocks, it monitors the clock signal at every oth er input pulse. refer to ? single-clock input monitoring (positive clock pulse) ? under ? timing diagram ?. 9.4 description of operations the numbers given to the follow ing items correspond to numbe rs (1) to (13) used in ? timing diagram ?. (1) the mb3793 outputs a reset si gnal when the supply voltage (v cc ) reaches about 0.8 v (v ccl ) (2) if v cc reaches or exceeds the ri se-time detected voltage v sh , the mb3793 starts charging the power-on reset hold time setting capacitor c tp . at this time, the output rema ins in a reset state. the v sh value is 2.87 v (typ) . (3) when c tp has been charged for a certain period of time t pr (until the ctp pin voltage exceeds the threshold voltage (v th ) after the start of charging), the mb37 93 cancels the reset (setting the reset pin to ?h? level from ?l? level). the v th value is about 2.4 v with v cc = 3.3 v the power-on reset hold time t pr is set with the following equation: t pr (ms) a c tp ( f) the value of a is about 750 with v cc = 3.3 v and about 700 with v cc = 3.0 v. the mb3793 also starts charging the watchdog timer mo nitor time setting capacitor (c tw ). (4) when the voltage at the watchd og timer monitor time setting pin c tw reaches the ?h? level threshold voltage v h , the ctw switches from the charge state to the discharge state. the value of v h is always about 1.24 v regard less of the detected voltage. (5) if the ck2 pin inputs a clock pulse (positive edge trigger) when the c tw is being discharged in the ck1-ck2 order or simultaneously, the c tw switches from the discharge state to the charge state. the mb3793 repeats operations (4) and (5) as long as the ck1/ck2 pin inputs clock pulses with the system logic circuit operating normally. (6) if no clock pulse is fed to the ck1 or ck 2 pin within the watchdog timer monitor time t wd due to some problem with the system logic ci rcuit, the ctw pin is set to th e ?l? level threshold voltage v l or less and the mb3793 outputs a reset signal (setting the reset pin to ?l? level from ?h? level). the value of v l is always about 0.24 v regard less of the detected voltage. the watchdog timer monitor time t wd is set with the following equation: t wd (ms) b c tw ( f) + c c tp ( f) the value of b is hardly affe cted by the power supply voltage ; it is about 1600 with v cc = 3.0 v to 3.3 v. the value of c is 0. for this reason: t wd (ms) b c tw ( f)
document number: 002-08559 rev. *c page 14 of 23 mb3793-28a (7) when a certain period of time t wr has passed (until the ctp pin volt age reaches or exceeds vth again after recharging the c tp ), the mb3793 cancels the reset signal an d starts operating the watchdog timer. the watchdog timer monitor reset time t wr is set with the following equation: t wr (ms) d c tp ( f) the value of d is 55 with v cc = 3.3 v and about 50 with v cc = 3.0 v. the mb3793 repeats operations (4) and (5 ) as long as the ck1/ck2 pin inputs cl ock pulses. if no clock pulse is input, the mb3793 repeats operations (6) and (7). (8) if v cc is lowered to the fall -time detected voltage (v sl ) or less, the ctp pin voltage decreases and the mb3793 outputs a reset signal (setting the reset pin to ?l? level from ?h? level). the value of v sl is 2.80 v (typ) . (9) when v cc reaches or exceeds v sh again, the mb3793 starts charging the c tp . (10) when the ctp pin volt age reaches or exceeds v th , the mb3793 cancels the reset and restarts operating the watchdog timer. it repeats oper ations (4) and (5) as long as th e ck1/ck2 pin inputs clock pulses. (11) making the inhibit pin active (setting the inh pin to ?h? from ?l?) forces the watchdog timer to stop operation. this stops only the watchdog timer, leaving the mb3793 monitoring v cc (operations (8) to (10)). the watchdog timer remains inactive unless the inhibit input is canceled. the inhibition (inh) pin must be connecting a voltage of more low im pedance, to evade of the noise. (12) canceling the inhibit input (setting the inh pin to ?l? from ?h?) restarts the watchdog timer. (13) the reset signal is output when the power supply is turned off to set v cc to v sl or less. 1. equation of time-setting capacitances (c tp and c tw ) and set time t pr [ms] a c tp [ f] t wd [ms] b c tw [ f] + c c tp [ f] however, when c tp /c tw 10 or less, t wd [ms] b c tw [ f] t wr [ms] d c tp [ f] values of a, b, c, and d note: the width of value of t pr , t wd and t wr becomes the same ratio as width (min, max) of each specification value. 2. example (when c tp = 0.1 f and c tw = 0.01 f ) a b c d remark 750 1600 0 55 v cc = 3.3 v 700 1600 0 50 v cc = 3.0 v time (ms) symbol v cc = 3.3 v v cc = 3.0 v t pr 75 70 t wd 16 16 t wr 5.5 5
document number: 002-08559 rev. *c page 15 of 23 mb3793-28a 10. typical characteristics (continued) 45 40 35 30 25 20 0 1.0 2.0 3.0 4.0 mb3793 v inh v cc (v inh = 0 v) 2.6 -20 -40 0 +20 +40 +60 +80 +100 +120 2.7 2.8 2.9 3.0 3.1 v sh v sl 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.3 3.2 0 ? 1 ? 2 ? 3 ? 4 ? 5 ? 6 ? 7 ? 8 ? 9 ? 10 at v cc = 3.3 v ta = + 25 c ta = + 85 c ta = ? 40 c 0 100 400 300 200 500 600 012345678910 at v cc = 3.3 v ta = + 25 c ta = + 85 c ta = ? 40 c i cc - v cc characteristics power current i cc ( a ) power voltage v cc (v) watchdog timer monitoring detection voltage v sh and v sl (v) operating ambient temperature ta ( c) reset output current i reset (ma) reset output voltage v reset (v) v reset - i reset characteristics (p-mos side) v reset - i reset characteristics (n-mos side) reset output voltage v reset (v) reset output current i reset (ma) v sh , v sl - ta characteristics f ck = 1 khz, duty = 10 % v l = 0 v/v h = v cc c tw = 0.01 f, c tp = 0.1 f
document number: 002-08559 rev. *c page 16 of 23 mb3793-28a (continued) 7 6 5 4 3 2 1 0 0 1234 ta = +85 c ta = +25 c ta = -40 c -40 -20 0 +20 +40 +60 +80 +100 +120 0 20 40 60 80 100 120 140 160 at v cc = 3.3 v ? 40 ? 20 0 +20 +40 +60 +80 +100 +120 0 2 4 6 8 10 12 14 16 at v cc = 3.3 v ? 40 ? 20 0 +20 +40 +60 +80 +100 +120 0 2 4 6 8 10 12 14 16 18 20 22 24 26 at v cc = 3.3 v v reset - v cc characteristics power voltage v cc (v) reset output voltage v reset (v) pull-up resistance : 100 k t pr - ta characteristics operating ambient temperature ta ( c) power-on reset hold time t pr (ms) t wr - ta characteristics t wd - ta characteristics operating ambient temperature ta ( c) operating ambient temperature ta ( c) watchdog timer reset time t wr (ms) watchdog timer monitoring time t wd (ms)
document number: 002-08559 rev. *c page 17 of 23 mb3793-28a (continued) 10 4 10 3 10 2 10 1 1 10 ? 1 10 ? 4 10 ? 3 10 ? 2 10 ? 1 110 1 10 2 ta = ? 40 c at v cc = 3.3 v ta = + 25 c ta = + 85 c 10 3 10 2 10 1 1 10 ? 1 10 ? 4 10 ? 3 10 ? 2 10 ? 1 110 2 10 1 10 ? 2 ta = ? 40 c at v cc = 3.3 v ta = + 25 c ta = + 85 c 10 3 10 2 10 1 1 10 ? 1 10 ? 4 10 ? 3 10 ? 2 10 ? 1 110 1 10 ? 5 ta = ? 40 c ta = + 25 c ta = + 85 c at vcc = 3.3 v t pr - c tp characteristics t wr - c tp characteristics power-on reset hold time t pr ( ms ) power-on reset hold time setting capacitance c tp ( f) power-on reset hold time setting capacitance c tp ( f) t wd - c tw characteristics watchdog timer monitoring time t wd (ms) watchdog timer monitoring time setting capacitance c tw ( f) watchdog timer reset time t wr (ms)
document number: 002-08559 rev. *c page 18 of 23 mb3793-28a 11. application example 11.1 supply voltage monitor and watchdog timer 11.1.1 1-clock monitor 11.1.2 2-clock monitor 5 2 3 6 4 7 8 1 reset v cc reset ck gnd gnd gnd c tw * c tp * v cc v cc ctw ctp ck1 ck2 inh mb3793 * : use a capacitor with less leakage current. microprocessor 2 3 6 1 8 7 4 5 v cc c tw * c tp * gnd inh gnd v cc ctp ctw reset ck1 ck2 reset ck gnd v cc reset ck gnd v cc mb3793 * : use a capacitor with less leakage current. microprocessor1 microprocessor2
document number: 002-08559 rev. *c page 19 of 23 mb3793-28a 11.2 supply voltage monitor and watchdog timer stop 11.3 setting of compulsory reset gnd c tw *c tp * v cc reset v cc ck gnd reset v cc ck gnd halt halt 5 2 3 6 4 7 8 1 reset gnd v cc inh ctw ck1 ck2 ctp mb3793 * : use a capacitor with less leakage current. microprocessor1 microprocessor2 5 2 3 6 4 7 8 1 reset v cc reset ck gnd gnd gnd c tw * c tp * resin 10 k v cc v cc ctw ctp ck1 ck2 inh mb3793 * : use a capacitor with less leakage current. it is possible for the reset pin to fix to ?l? if the ctp pin is short-circuited to gnd. take care not to chan ge the value of the c tp capacity because of the influence of tr that is used at the time. microprocessor
document number: 002-08559 rev. *c page 20 of 23 mb3793-28a 12. usage precaution 1. do not configure the ic over the maximum ratings if the lc is used over the maximum rating s, the lsl may be permanently damaged. it is preferable for the device to normally operate within the recommended usage conditions . usage outside of these conditions can have a bad effect on the reliability of the lsi. 2. use the devices within recommended operating conditions the recommended operating conditions are under which the lsl is guar anteed to operate. the electrical ratings are guaranteed when the device is used within the recommended operating conditions and under the conditions stated for each item. 3. printed circuit board ground lines should be set up with consideration for common impedance 4. take appropriate measures against static electricity ? containers for semiconductor materials should have anti-s tatic protection or be made of conductive material. ? after mounting, printed circuit boards should be stored and shipped in conduc tive bags or containers. ? work platforms, tools, and instruments should be properly grounded. ? working personnel should be grounded with resistance of 250 k to 1 m between body and ground. 5. do not apply negative voltages the use of negative voltages below ?0.3 v may create parasitic transis tors on lsi lines, which can cause malfunctions. 13. ordering information 14. rohs compliance information of lead (pb) free version the lsi products of fujitsu microelectroni cs with ?e1? are compliant with rohs directive , and has obs erved the standard of lea d, cadmium, mercury, hexavalent chromium, polybrominated biphenyls (pbb) , and po lybrominated diphenyl ethers (pbde) . the product that conforms to this standard is added ?e1? at the end of the part number. part number package remarks MB3793-28APNF 8-pin plastic sop (sob008) ?
document number: 002-08559 rev. *c page 21 of 23 mb3793-28a 15. package dimensions    $ / /  ' , 0 ( 1 6 , 2 1 6  $ 5 (  , 1  0 , / / , 0 ( 7 ( 5     ' , 0 ( 1 6 , 2 1 , 1 *  $ 1 '  7 2 / ( 5 $ 1 & , 1 *  3 ( 5   $ 6 0 (  <     0          ' , 0 ( 1 6 , 2 1 , 1 *  '  , 1 & / 8 ' (  0 2 / '  ) / $ 6 +   ' , 0 ( 1 6 , 2 1 , 1 *  (   ' 2 ( 6  1 2 7  , 1 & / 8 ' (     , 1 7 ( 5 / ( $ '  ) / $ 6 +  2 5  3 5 2 7 5 8 6 , 2 1   , 1 7 ( 5 / ( $ '  ) / $ 6 +  2 5  3 5 2 7 5 8 6 , 2 1 6     6 + $ / /  1 2 7  ( ; & ( ( '        p p  3 ( 5  6 , ' (   '  d q g  (   ' , 0 ( 1 6 , 2 1  $ 5 (  ' ( 7 ( 5 0 , 1 ( '     $ 7  ' $ 7 8 0  +     7 + (  3 $ & . $ * (  7 2 3  0 $ <  % (  6 0 $ / / ( 5  7 + $ 1  7 + (  3 $ & . $ * (  % 2 7 7 2 0      ' , 0 ( 1 6 , 2 1 , 1 *   '  d q g  (   $ 5 (  ' ( 7 ( 5 0 , 1 ( '  $ 7  7 + (  2 8 7 ( 5 0 2 6 7     ( ; 7 5 ( 0 ( 6  2 )  7 + (  3 / $ 6 7 , &  % 2 ' <  ( ; & / 8 6 , 9 (  2 )  0 2 / '  ) / $ 6 +      7 + (  % $ 5  % 8 5 5 6   * $ 7 (  % 8 5 5 6  $ 1 '  , 1 7 ( 5 / ( $ '  ) / $ 6 +   % 8 7  , 1 & / 8 ' , 1 *     $ 1 <  0 , 6 0 $ 7 & +  % ( 7 : ( ( 1  7 + (  7 2 3  $ 1 '  % 2 7 7 2 0  2 )  7 + (  3 / $ 6 7 , &  % 2 ' <     ' $ 7 8 0 6  $   %  7 2  % (  ' ( 7 ( 5 0 , 1 ( '  $ 7  ' $ 7 8 0  +      1   , 6  7 + (  0 $ ; , 0 8 0  1 8 0 % ( 5  2 )  7 ( 5 0 , 1 $ /  3 2 6 , 7 , 2 1 6  ) 2 5  7 + (  6 3 ( & , ) , ( '      3 $ & . $ * (  / ( 1 * 7 +     7 + (  ' , 0 ( 1 6 , 2 1  $ 3 3 / <  7 2  7 + (  ) / $ 7  6 ( & 7 , 2 1  2 )  7 + (  / ( $ '  % ( 7 : ( ( 1       p p     7 2      p p  ) 5 2 0  7 + (  / ( $ '  7 , 3     ' , 0 ( 1 6 , 2 1   e   ' 2 ( 6  1 2 7  , 1 & / 8 ' (  7 + (  ' $ 0 % $ 5  3 5 2 7 5 8 6 , 2 1   $ / / 2 : $ % / (     ' $ 0 % $ 5  3 5 2 7 5 8 6 , 2 1  6 + $ / /  % (      p p  7 2 7 $ /  , 1  ( ; & ( 6 6  2 )  7 + (   e   ' , 0 ( 1 6 , 2 1     $ 7  0 $ ; , 0 8 0  0 $ 7 ( 5 , $ /  & 2 1 ' , 7 , 2 1      7 + (  ' $ 0 % $ 5  0 $ <  1 2 7  % (  / 2 & $ 7 ( '  2 1  7 + (  / 2 : ( 5  5 $ ' , 8 6  2 )  7 + (  ) 2 2 7     7 + , 6  & + $ 0 ) ( 5  ) ( $ 7 8 5 (  , 6  2 3 7 , 2 1 $ /   / )  , 7  , 6  1 2 7  3 5 ( 6 ( 1 7   7 + ( 1  $  3 , 1       , ' ( 1 7 , ) , ( 5  0 8 6 7  % (  / 2 & $ 7 ( '  : , 7 + , 1  7 + (  , 1 ' ( ;  $ 5 ( $  , 1 ' , & $ 7 ( '      $    , 6  ' ( ) , 1 ( '  $ 6  7 + (  9 ( 5 7 , & $ /  ' , 6 7 $ 1 & (  ) 5 2 0  7 + (  6 ( $ 7 , 1 *  3 / $ 1 (  7 2        7 + (  / 2 : ( 6 7   3 2 , 1 7  2 1  7 + (  3 $ & . $ * (  % 2 ' <  ( ; & / 8 ' , 1 *  7 + (  / , '  $ 1 '  2 5        7 + ( 5 0 $ /  ( 1 + $ 1 & ( 0 ( 1 7  2 1  & $ 9 , 7 <  ' 2 : 1  3 $ & . $ * (  & 2 1 ) , * 8 5 $ 7 , 2 1 6  1 2 7 ( 6 l 1 1.05 ref l c 0.45 0.15 0.60 0.75 0.25 nom. min. 6.00 bsc. e 0 d 2 a a 1 a 1.30 5.05 bsc. 1.40 0.05 symbol max. 8 1.50 1.75 0.25  e 1 3.90 bsc b 0.36 0.44 0.52 e 1.27 bsc. dimensions l 2 0.25 bsc h 0.40 bsc. 11. jedec specification no. ref : n/a d 4 5  e1 e    0.20 c a-b d a a2 a1 10 detail a e 0.10 c seating plane b 0.13 c a-b d 8 side view top view b section a-a' c l1 l gauge plane detail a l2  a a' 0.25 h d  ; 0.25 h d > >e >? 4  5 index area  ;  h 45 side view        bottom view >? package code: sob008 002-15856 rev. **
document number: 002-08559 rev. *c page 22 of 23 mb3793-28a 16. document history document title: mb3793-28a power-voltage monitoring ic with watchdog timer datasheet document number: 002-08559 revision ecn orig. of change submission date description of change ** ? taoa 12/03/2009 migrated to cypress and assigned document number 002-08559. no change to document contents or format. *a 5186892 taoa 03/31/2016 updated to cypress template *b 5606220 hixt 02/07/2017 updated pin assignment : change the package name from fpt-8p-m01 to soe008 updated ordering information : change the package name fr om fpt-8p-m01 to soe008 updated package dimensions : updated to cypress format deleted ?marking format (lead free version)? deleted ?labeling sample (lead free version)? deleted ?MB3793-28APNF recommended conditi ons of moisture sensitivity level? *c 5782377 masg 06/22/2017 adapted cypress new logo.
document number: 002-08559 rev. *c revised june 22, 2017 page 23 of 23 ? cypress semiconductor corporation, 2009-2017. this document is the property of cypre ss semiconductor corporation and its subs idiaries, including spansion llc (?cypress?). this document, including any software or firmwa re included or referenced in this document (?software?), is owne d by cypress under the intellec tual property laws and treaties of th e united states and other countries worldwide. cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragr aph, grant any license under its patent s, copyrights, trad emarks, or other intellectual property right s. if the software is not accomp anied by a license agreement and yo u do not otherwise have a writte n agreement with cypress governing the use of the software, then cypress hereby grants you a personal, non-exclusive, nontransferable license (witho ut the right to sublicense) (1) under its copyright rights in the software (a) for softwa re provided in source code form, to modify and reproduce the software solely for use with cypress hardware products, only internally within your organization, and (b) to distribute the software in bi nary code form externally to end users (either directly or indirectly through rese llers and distributors), solely for use on cy press hardware produc t units, and (2) u nder those claims of cypress?s patents that are infringed by the software (as provided by cypress, unmodified) to make, use, distribute, and import t he software solely for use with cypress hardware product s. any other use, reproduction, modi fication, translati on, or compilation of the software is prohibited. to the extent permitted by applicab le law, cypress makes no warrant y of any kind, express or implie d, with regard to this docum ent or any software or accompanying hardware, includ ing, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. to the extent permitted by applicable law, cypr ess reserves the right to make changes to this document without further notice. cypress does n ot assume any liability arising out of the applicati on or use of any product or circuit described in this document. any informati on provided in this document, incl uding any sample design informat ion or programming code, is provided only for reference purposes. it is the responsibility of the user of this docum ent to properly design, prog ram, and test the functional ity and safety of any appli cation made of this information and any resulting product. cypress products are not designed, inte nded, or authorized for use as critical components in systems designe d or intended for the operation of w eapons, weapons systems, nuclear instal lations, life-support devices or systems, other medical devices or systems (inc luding resuscitation equipment and surgical implants), pollution control or hazar dous substances management , or other uses wher e the failure of the device or system could cause per sonal injury, death, or property damage (?uninte nded uses?). a critical component is any compo nent of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. cypress is not liable, in who le or in part, and you shall and hereby do release cypre ss from any claim, damage, or other liability arisi ng from or related to all unin tended uses of cypress products. you shall indemnify and hold cy press harmless from and against all claims, costs, damages, and other liabilities, including claims for pe rsonal injury or death, arising from or related to any un intended uses of cypress products. cypress, the cypress logo, spansion, the spansion l ogo, and combinations thereof, wiced, psoc, capsense, ez-usb, f-ram, and tra veo are trademarks or regist ered trademarks of cypress in the united states and other countries. for a more complete li st of cypress trademar ks, visit cypress.com. other names and bra nds may be claimed as property of their respective owners.. mb3793-28a sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representative s, and distributors. to find t he office closest to you, visit us at cypress locations . products arm ? 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